Workshop on Programming Models for SIMD/Vector ProcessingWPMVP 2018

Accepted Papers

Call for Papers

SIMD processing is still a main driver of performance in general purpose processor architectures besides multi-core technology. Both technologies increase the potential performance by factors, but have to be be explicitly utilized by the software. To expose those different levels of parallelism in a productive and manageable way is still an active area of research. NVIDIA stirred the programming interface scene with the development of a simple yet efficient performance-oriented application programmer interface. OpenACC, OpenMP 4.0, OpenCL, Cilk+ and icpc are just examples for many choices available. Additionally, established optimizing compilers still improve significantly in unleashing the SIMD potential. Notable developments on the hardware side include relaxation of alignment requirements and more powerful scatter/gather and shuffle instructions. Recent developments include the introduction of 512bit SIMD units in general purpose processors (AVX512) and new innovations as the Scalable Vector Extension for the ARMv8-A architecture.

Scope

The purpose of this workshop is to bring together practitioners and researchers from academia and industry to discuss issues, solutions, and opportunities in enabling application developers to effectively exploit SIMD/vector processing in modern processors. We seek submissions that cover all aspects of SIMD/vector processing. Topics of interests include, but are not restricted to:

• Programming models for SIMD/vector processing
• C/C++/Fortran extensions for SIMD (e.g., OpenMP, OpenACC, OpenCL, SIMD intrinsics)
• New data parallel or streaming programming models for SIMD
• Exploitation of SIMD/vector in Java, scripting languages, and domain-specific languages
• Compilers & tools to discover and optimize SIMD parallelism
• Case study, experience report, and performance analysis of SIMD/vector applications

Submission

Submitted papers must be no more than 8 pages in length. Authors are encouraged to use the ACM two-column format here. Each submission will receive at least three reviews from the technical program committee and authors of selected submissions will have 30 minutes to present their work at the workshop.

Authors must register and submit the paper through online submission system, if you have problems accessing the system, e-mail your submission to jan.eitzinger@fau.de .

Organisers:

• Jan Eitzinger (RRZE, University Erlangen-Nuremberg, Germany)
• James Brodman (Intel, USA)

PC

• Jan Eitzinger (RRZE, University Erlangen-Nuremberg, Germany)
• Gabriel Tanase (IBM Research, Austin, TX, USA)
• James Brodman (Intel, USA)
• Sebastian Hack (University Saarland, Germany)
• Paul Kelly (Imperial College London, UK)
• Franz Franchetti ( CMU, USA )
• Lionel Lacassagne (University Paris 6, France)
• Daniel Etiemble (University Paris 11, France)
• Michael Klemm (Intel, Germany)
• Jose Moreira ( IBM Research, TJ Watson, NY, USA )
• Marat Dukhan (Georgia Tech, USA now Facebook)
• Etienne Walter (Atos, France)
• Pablo de Oliveira Castro (UVSQ, Versailles, France)
• Peng Wu (Huawei Research Labs, USA)
• Gabriele Keller (University of New South Wales, Australia)
• Fernanda Foertter (Oak Ridge National Lab, US)
• Sandra Wienke (RWTH Aachen, Germany)
• Roxana Rusitoru (ARM, UK)